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GPUTracking: place global constexpr constants in the "constant" address space (#15818)
MSL requires every variable at program scope to name an address space and diagnoses it at the declaration, so these headers broke any device translation unit that included them. GPUglobalconstexpr() expands to constexpr everywhere except Metal, where it adds `constant`. Attempt to make Apple avoid the need for the extra specifier reported as Apple Feedback `FB24852288`.
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Lines changed: 474 additions & 435 deletions

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‎Common/Constants/CMakeLists.txt‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -9,4 +9,5 @@
99
# granted to it by virtue of its status as an Intergovernmental Organization
1010
# or submit itself to any jurisdiction.
1111

12-
o2_add_header_only_library(CommonConstants)
12+
o2_add_header_only_library(CommonConstants
13+
INTERFACE_LINK_LIBRARIES O2::GPUCommon)

‎Common/Constants/include/CommonConstants/LHCConstants.h‎

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -16,6 +16,8 @@
1616
#ifndef ALICEO2_LHCCONSTANTS_H_
1717
#define ALICEO2_LHCCONSTANTS_H_
1818

19+
#include "GPUCommonDef.h"
20+
1921
namespace o2
2022
{
2123
namespace constants
@@ -28,17 +30,17 @@ enum BeamDirection : int { BeamA, // beamA = beam 0,
2830
NBeamDirections,
2931
InteractingBC = -1 // as used in the BunchFilling class
3032
};
31-
constexpr int LHCMaxBunches = 3564; // max N bunches
33+
GPUglobalconstexpr() int LHCMaxBunches = 3564; // max N bunches
3234
constexpr double LHCRFFreq = 400.789e6; // LHC RF frequency in Hz
3335
constexpr double LHCBunchSpacingNS = 10 * 1.e9 / LHCRFFreq; // bunch spacing in ns (10 RFbuckets)
3436
constexpr double LHCOrbitNS = LHCMaxBunches * LHCBunchSpacingNS; // orbit duration in ns
3537
constexpr double LHCRevFreq = 1.e9 / LHCOrbitNS; // revolution frequency
3638
constexpr double LHCBunchSpacingMUS = LHCBunchSpacingNS * 1e-3; // bunch spacing in \mus (10 RFbuckets)
3739
constexpr double LHCOrbitMUS = LHCOrbitNS * 1e-3; // orbit duration in \mus
38-
constexpr unsigned int MaxNOrbits = 0xffffffff;
40+
GPUglobalconstexpr() unsigned int MaxNOrbits = 0xffffffff;
3941

4042
// Offsets of A, C beam bunches at P2
41-
constexpr int BunchOffsetsP2[2] = {344, 3017};
43+
GPUglobalconstexpr() int BunchOffsetsP2[2] = {344, 3017};
4244

4345
// convert LHC bunch ID to BC for 2 beam directions
4446
constexpr int LHCBunch2P2BC(int bunch, BeamDirection dir)

‎Common/Constants/include/CommonConstants/MathConstants.h‎

Lines changed: 17 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -16,31 +16,33 @@
1616
#ifndef ALICEO2_COMMON_MATH_CONSTANTS_
1717
#define ALICEO2_COMMON_MATH_CONSTANTS_
1818

19+
#include "GPUCommonDef.h"
20+
1921
namespace o2
2022
{
2123
namespace constants
2224
{
2325
namespace math
2426
{
25-
constexpr float Almost0 = 0x1.0p-126f; // smallest non-denormal float
26-
constexpr float Epsilon = 0x0.000002p0f; // smallest float such that 1 != 1 + Epsilon
27-
constexpr float Almost1 = 1.f - 1.0e-6f;
28-
constexpr float VeryBig = 1.f / Almost0;
27+
GPUglobalconstexpr() float Almost0 = 0x1.0p-126f; // smallest non-denormal float
28+
GPUglobalconstexpr() float Epsilon = 0x0.000002p0f; // smallest float such that 1 != 1 + Epsilon
29+
GPUglobalconstexpr() float Almost1 = 1.f - 1.0e-6f;
30+
GPUglobalconstexpr() float VeryBig = 1.f / Almost0;
2931

30-
constexpr float PI = 3.14159274101257324e+00f;
31-
constexpr float TwoPI = 2.f * PI;
32-
constexpr float PIHalf = 0.5f * PI;
33-
constexpr float PIThird = PI / 3.0f;
34-
constexpr float PIQuarter = 0.25f * PI;
35-
constexpr float Rad2Deg = 180.f / PI;
36-
constexpr float Deg2Rad = PI / 180.f;
32+
GPUglobalconstexpr() float PI = 3.14159274101257324e+00f;
33+
GPUglobalconstexpr() float TwoPI = 2.f * PI;
34+
GPUglobalconstexpr() float PIHalf = 0.5f * PI;
35+
GPUglobalconstexpr() float PIThird = PI / 3.0f;
36+
GPUglobalconstexpr() float PIQuarter = 0.25f * PI;
37+
GPUglobalconstexpr() float Rad2Deg = 180.f / PI;
38+
GPUglobalconstexpr() float Deg2Rad = PI / 180.f;
3739

38-
constexpr int NSectors = 18;
39-
constexpr float SectorSpanDeg = 360. / NSectors;
40-
constexpr float SectorSpanRad = SectorSpanDeg * Deg2Rad;
40+
GPUglobalconstexpr() int NSectors = 18;
41+
GPUglobalconstexpr() float SectorSpanDeg = 360. / NSectors;
42+
GPUglobalconstexpr() float SectorSpanRad = SectorSpanDeg * Deg2Rad;
4143

4244
// conversion from B(kGaus) to curvature for 1GeV pt
43-
constexpr float B2C = -0.299792458e-3;
45+
GPUglobalconstexpr() float B2C = -0.299792458e-3;
4446
} // namespace math
4547
} // namespace constants
4648
} // namespace o2

‎Common/MathUtils/include/MathUtils/Cartesian.h‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -52,10 +52,10 @@ namespace math_utils
5252
/// The IDs must be < 32
5353

5454
struct TransformType {
55-
static constexpr int L2G = 0;
56-
static constexpr int T2L = 1;
57-
static constexpr int T2G = 2;
58-
static constexpr int T2GRot = 3;
55+
static GPUglobalconstexpr() int L2G = 0;
56+
static GPUglobalconstexpr() int T2L = 1;
57+
static GPUglobalconstexpr() int T2G = 2;
58+
static GPUglobalconstexpr() int T2GRot = 3;
5959
}; /// transformation types
6060

6161
template <typename value_T>

‎DataFormats/Detectors/Common/include/DetectorsCommonDataFormats/DetID.h‎

Lines changed: 33 additions & 31 deletions
Original file line numberDiff line numberDiff line change
@@ -28,6 +28,8 @@
2828
#ifndef O2_BASE_DETID_
2929
#define O2_BASE_DETID_
3030

31+
#include "GPUCommonDef.h"
32+
3133
#include "GPUCommonRtypes.h"
3234
#include "GPUCommonBitSet.h"
3335
#include "MathUtils/Utils.h"
@@ -60,45 +62,45 @@ class DetID
6062
/// Detector identifiers: continuous, starting from 0
6163
typedef int ID;
6264

63-
static constexpr ID ITS = 0;
64-
static constexpr ID TPC = 1;
65-
static constexpr ID TRD = 2;
66-
static constexpr ID TOF = 3;
67-
static constexpr ID PHS = 4;
68-
static constexpr ID CPV = 5;
69-
static constexpr ID EMC = 6;
70-
static constexpr ID HMP = 7;
71-
static constexpr ID MFT = 8;
72-
static constexpr ID MCH = 9;
73-
static constexpr ID MID = 10;
74-
static constexpr ID ZDC = 11;
75-
static constexpr ID FT0 = 12;
76-
static constexpr ID FV0 = 13;
77-
static constexpr ID FDD = 14;
78-
static constexpr ID TST = 15;
79-
static constexpr ID CTP = 16;
80-
static constexpr ID FOC = 17;
65+
static GPUglobalconstexpr() ID ITS = 0;
66+
static GPUglobalconstexpr() ID TPC = 1;
67+
static GPUglobalconstexpr() ID TRD = 2;
68+
static GPUglobalconstexpr() ID TOF = 3;
69+
static GPUglobalconstexpr() ID PHS = 4;
70+
static GPUglobalconstexpr() ID CPV = 5;
71+
static GPUglobalconstexpr() ID EMC = 6;
72+
static GPUglobalconstexpr() ID HMP = 7;
73+
static GPUglobalconstexpr() ID MFT = 8;
74+
static GPUglobalconstexpr() ID MCH = 9;
75+
static GPUglobalconstexpr() ID MID = 10;
76+
static GPUglobalconstexpr() ID ZDC = 11;
77+
static GPUglobalconstexpr() ID FT0 = 12;
78+
static GPUglobalconstexpr() ID FV0 = 13;
79+
static GPUglobalconstexpr() ID FDD = 14;
80+
static GPUglobalconstexpr() ID TST = 15;
81+
static GPUglobalconstexpr() ID CTP = 16;
82+
static GPUglobalconstexpr() ID FOC = 17;
8183
#ifdef ENABLE_UPGRADES
82-
static constexpr ID IT3 = 18;
83-
static constexpr ID TRK = 19;
84-
static constexpr ID FT3 = 20;
85-
static constexpr ID FCT = 21;
86-
static constexpr ID TF3 = 22;
87-
static constexpr ID RCH = 23;
88-
static constexpr ID MI3 = 24;
89-
static constexpr ID ECL = 25;
90-
static constexpr ID FD3 = 26;
91-
static constexpr ID Last = FD3;
84+
static GPUglobalconstexpr() ID IT3 = 18;
85+
static GPUglobalconstexpr() ID TRK = 19;
86+
static GPUglobalconstexpr() ID FT3 = 20;
87+
static GPUglobalconstexpr() ID FCT = 21;
88+
static GPUglobalconstexpr() ID TF3 = 22;
89+
static GPUglobalconstexpr() ID RCH = 23;
90+
static GPUglobalconstexpr() ID MI3 = 24;
91+
static GPUglobalconstexpr() ID ECL = 25;
92+
static GPUglobalconstexpr() ID FD3 = 26;
93+
static GPUglobalconstexpr() ID Last = FD3;
9294
#else
9395
static constexpr ID Last = FOC; ///< if extra detectors added, update this !!!
9496
#endif
95-
static constexpr ID First = ITS;
97+
static GPUglobalconstexpr() ID First = ITS;
9698

97-
static constexpr int nDetectors = Last + 1; ///< number of defined detectors
99+
static GPUglobalconstexpr() int nDetectors = Last + 1; ///< number of defined detectors
98100
typedef o2::gpu::gpustd::bitset<32> mask_t;
99101
static_assert(nDetectors <= 32, "bitset<32> insufficient");
100102

101-
static constexpr mask_t FullMask = (0x1u << nDetectors) - 1;
103+
static GPUglobalconstexpr() mask_t FullMask = (0x1u << nDetectors) - 1;
102104

103105
#ifndef GPUCA_GPUCODE_DEVICE
104106
static constexpr std::string_view NONE{"none"}; ///< keywork for no-detector

‎DataFormats/Detectors/TPC/include/DataFormatsTPC/CalibdEdxCorrection.h‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -39,8 +39,8 @@ GPUconstexpr() float TglScale[4] = {1.9, 1.5, 1.22, 1.02}; ///< Max Tgl values f
3939
class CalibdEdxCorrection
4040
{
4141
public:
42-
static constexpr int FitSize = 288; ///< Number of fitted corrections
43-
static constexpr int ParamSize = 8; ///< Number of params per fit
42+
static GPUglobalconstexpr() int FitSize = 288; ///< Number of fitted corrections
43+
static GPUglobalconstexpr() int ParamSize = 8; ///< Number of params per fit
4444

4545
#if !defined(GPUCA_GPUCODE)
4646
CalibdEdxCorrection()

‎DataFormats/Detectors/TPC/include/DataFormatsTPC/ClusterNative.h‎

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -59,13 +59,13 @@ struct ClusterNative {
5959
flagEdge = 0x4, // At edge of TPC sector
6060
flagSingle = 0x8 }; // Single pad or single time-bin cluster
6161

62-
static constexpr int scaleTimePacked = 64; //< ~50 is needed for 0.1mm precision, but leads to float rounding artifacts around 20ms
63-
static constexpr int scalePadPacked = 64; //< ~60 is needed for 0.1mm precision, but power of two avoids rounding
64-
static constexpr int scaleSigmaTimePacked = 32; // 1/32nd of pad/timebin precision for cluster size
65-
static constexpr int scaleSigmaPadPacked = 32;
66-
static constexpr int scaleSaturatedQtot = 8;
67-
static constexpr int maxRegularQtot = 25 * 1024;
68-
static constexpr int maxSaturatedQtot = (USHRT_MAX - maxRegularQtot) * scaleSaturatedQtot;
62+
static GPUglobalconstexpr() int scaleTimePacked = 64; //< ~50 is needed for 0.1mm precision, but leads to float rounding artifacts around 20ms
63+
static GPUglobalconstexpr() int scalePadPacked = 64; //< ~60 is needed for 0.1mm precision, but power of two avoids rounding
64+
static GPUglobalconstexpr() int scaleSigmaTimePacked = 32; // 1/32nd of pad/timebin precision for cluster size
65+
static GPUglobalconstexpr() int scaleSigmaPadPacked = 32;
66+
static GPUglobalconstexpr() int scaleSaturatedQtot = 8;
67+
static GPUglobalconstexpr() int maxRegularQtot = 25 * 1024;
68+
static GPUglobalconstexpr() int maxSaturatedQtot = (USHRT_MAX - maxRegularQtot) * scaleSaturatedQtot;
6969

7070
uint32_t timeFlagsPacked; //< Contains the time in the lower 24 bits in a packed format, contains the flags in the
7171
// upper 8 bits

‎DataFormats/Detectors/TPC/include/DataFormatsTPC/Defs.h‎

Lines changed: 9 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -19,6 +19,8 @@
1919
#ifndef AliceO2_TPC_Defs_H
2020
#define AliceO2_TPC_Defs_H
2121

22+
#include "GPUCommonDef.h"
23+
2224
#ifndef GPUCA_GPUCODE_DEVICE
2325
#include <cmath>
2426
#endif
@@ -37,8 +39,8 @@ enum Side { A = 0,
3739
UNDEFINED = 2 };
3840
// enum class Side {A=0, C=1};
3941
// Problem with root cint. does not seem to support enum class ...
40-
constexpr unsigned char SECTORSPERSIDE = 18;
41-
constexpr unsigned char SIDES = 2;
42+
GPUglobalconstexpr() unsigned char SECTORSPERSIDE = 18;
43+
GPUglobalconstexpr() unsigned char SIDES = 2;
4244

4345
constexpr double PI = 3.14159265358979323846;
4446
constexpr double TWOPI = 2. * PI;
@@ -54,10 +56,10 @@ enum GEMstack { IROCgem = 0,
5456
OROC1gem = 1,
5557
OROC2gem = 2,
5658
OROC3gem = 3 };
57-
constexpr unsigned short GEMSTACKSPERSECTOR = 4;
58-
constexpr unsigned short GEMSPERSTACK = 4;
59-
constexpr unsigned short GEMSTACKSPERSIDE = GEMSTACKSPERSECTOR * SECTORSPERSIDE;
60-
constexpr unsigned short GEMSTACKS = GEMSTACKSPERSECTOR * SECTORSPERSIDE * SIDES;
59+
GPUglobalconstexpr() unsigned short GEMSTACKSPERSECTOR = 4;
60+
GPUglobalconstexpr() unsigned short GEMSPERSTACK = 4;
61+
GPUglobalconstexpr() unsigned short GEMSTACKSPERSIDE = GEMSTACKSPERSECTOR * SECTORSPERSIDE;
62+
GPUglobalconstexpr() unsigned short GEMSTACKS = GEMSTACKSPERSECTOR * SECTORSPERSIDE * SIDES;
6163

6264
/// Definition of the different pad subsets
6365
enum class PadSubset : char {
@@ -71,7 +73,7 @@ enum ChargeType {
7173
Max = 0,
7274
Tot = 1
7375
};
74-
constexpr unsigned short CHARGETYPES = 2;
76+
GPUglobalconstexpr() unsigned short CHARGETYPES = 2;
7577

7678
/// GEM stack identification
7779
struct StackID {

‎DataFormats/Detectors/TPC/include/DataFormatsTPC/ZeroSuppression.h‎

Lines changed: 11 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -35,12 +35,12 @@ enum ZSVersion : unsigned char {
3535
};
3636

3737
struct TPCZSHDR {
38-
static constexpr size_t TPC_ZS_PAGE_SIZE = 8192;
39-
static constexpr size_t TPC_MAX_SEQ_LEN = 138;
40-
static constexpr size_t TPC_MAX_ZS_ROW_IN_ENDPOINT = 9;
41-
static constexpr unsigned int MAX_DIGITS_IN_PAGE = (TPC_ZS_PAGE_SIZE - 64 - 6 - 4 - 3) * 8 / 10;
42-
static constexpr unsigned int TPC_ZS_NBITS_V1 = 10;
43-
static constexpr unsigned int TPC_ZS_NBITS_V2 = 12;
38+
static GPUglobalconstexpr() size_t TPC_ZS_PAGE_SIZE = 8192;
39+
static GPUglobalconstexpr() size_t TPC_MAX_SEQ_LEN = 138;
40+
static GPUglobalconstexpr() size_t TPC_MAX_ZS_ROW_IN_ENDPOINT = 9;
41+
static GPUglobalconstexpr() unsigned int MAX_DIGITS_IN_PAGE = (TPC_ZS_PAGE_SIZE - 64 - 6 - 4 - 3) * 8 / 10;
42+
static GPUglobalconstexpr() unsigned int TPC_ZS_NBITS_V1 = 10;
43+
static GPUglobalconstexpr() unsigned int TPC_ZS_NBITS_V2 = 12;
4444

4545
unsigned char version; // ZS format version:
4646
// 1: original row-based format with 10-bit ADC values
@@ -53,10 +53,10 @@ struct TPCZSHDR {
5353
unsigned short nADCsamples; // Total number of ADC samples in this raw page
5454
};
5555
struct TPCZSHDRV2 : public TPCZSHDR {
56-
static constexpr unsigned int TPC_ZS_NBITS_V34 = 12;
57-
static constexpr bool TIGHTLY_PACKED_V3 = false;
58-
static constexpr unsigned int SAMPLESPER64BIT = 64 / TPC_ZS_NBITS_V34; // 5 12-bit samples with 4 bit padding per 64 bit word for non-TIGHTLY_PACKED data
59-
static constexpr unsigned int TRIGGER_WORD_SIZE = 16; // trigger word size in bytes
56+
static GPUglobalconstexpr() unsigned int TPC_ZS_NBITS_V34 = 12;
57+
static GPUglobalconstexpr() bool TIGHTLY_PACKED_V3 = false;
58+
static GPUglobalconstexpr() unsigned int SAMPLESPER64BIT = 64 / TPC_ZS_NBITS_V34; // 5 12-bit samples with 4 bit padding per 64 bit word for non-TIGHTLY_PACKED data
59+
static GPUglobalconstexpr() unsigned int TRIGGER_WORD_SIZE = 16; // trigger word size in bytes
6060
enum ZSFlags : unsigned char {
6161
TriggerWordPresent = 1,
6262
nTimeBinSpanBit8 = 2,
@@ -89,7 +89,7 @@ struct ZeroSuppressedContainer { // Struct for the TPC zero suppressed data form
8989
///
9090
/// Trigger word is always 128bit and occurs always in the last page of a HBF before the meta header
9191
struct TriggerWordDLBZS {
92-
static constexpr uint16_t MaxTriggerEntries = 8; ///< Maximum number of trigger information
92+
static GPUglobalconstexpr() uint16_t MaxTriggerEntries = 8; ///< Maximum number of trigger information
9393

9494
/// trigger types as in the ttype bits
9595
enum TriggerType : uint8_t {

‎DataFormats/Detectors/TPC/include/DataFormatsTPC/ZeroSuppressionLinkBased.h‎

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -30,16 +30,16 @@ namespace tpc
3030
namespace zerosupp_link_based
3131
{
3232

33-
static constexpr uint32_t DataWordSizeBits = 128; ///< size of header word and data words in bits
34-
static constexpr uint32_t DataWordSizeBytes = DataWordSizeBits / 8; ///< size of header word and data words in bytes
35-
static constexpr uint32_t ChannelPerTBHeader = 80;
33+
static GPUglobalconstexpr() uint32_t DataWordSizeBits = 128; ///< size of header word and data words in bits
34+
static GPUglobalconstexpr() uint32_t DataWordSizeBytes = DataWordSizeBits / 8; ///< size of header word and data words in bytes
35+
static GPUglobalconstexpr() uint32_t ChannelPerTBHeader = 80;
3636

3737
/// common header definition of the zero suppressed link based data
3838
struct CommonHeader {
39-
static constexpr uint32_t MagicWordLinkZS = 0xFC;
40-
static constexpr uint32_t MagicWordLinkZSMetaHeader = 0xFD;
41-
static constexpr uint32_t MagicWordTrigger = 0xAA;
42-
static constexpr uint32_t MagicWordTriggerV2 = 0xAB;
39+
static GPUglobalconstexpr() uint32_t MagicWordLinkZS = 0xFC;
40+
static GPUglobalconstexpr() uint32_t MagicWordLinkZSMetaHeader = 0xFD;
41+
static GPUglobalconstexpr() uint32_t MagicWordTrigger = 0xAA;
42+
static GPUglobalconstexpr() uint32_t MagicWordTriggerV2 = 0xAB;
4343

4444
union {
4545
uint64_t word0 = 0; ///< lower 64 bits

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