From 9a605be40690b1da8aeeb24a81bf5be88a454eef Mon Sep 17 00:00:00 2001 From: Joseph <162703152+josephnef@users.noreply.github.com> Date: Thu, 28 May 2026 21:57:25 +0300 Subject: [PATCH] RTL8814AU: iterate HT_MCS24-31 + VHT_4SS in per-path TX power apply MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit `phy_set_tx_power_level_by_path` was stopping at 3SS for 8814AU, but upstream `PHY_SetTxPowerLevel8814` iterates all sections including 4SS even though USB-2 can't sustain 4-SS data rates — the chip's TXAGC table at BB 0x1998 still needs to be fully populated. The existing comment ("upstream PHY_SetTxPowerLevel8814 iterates all sections") documented the intent but the patch stopped at 3SS. Cold-init usbmon diff against `aircrack-ng/88XXau` in the devourer-testrig VM (2026-05-28): Kernel writes BB 0x1998: 1029 times Devourer (pre-patch): 781 times Devourer (post-patch): 925 times The 144-write delta matches (8 HT_MCS24-31 + 10 VHT_4SS) rates × 4 RF paths × 2 `PHY_SetTxPowerLevel8812` applies per cold init = 144. Empirically does NOT close the on-air TX gate on 8814AU on its own (sniffer-attached run still shows 0 frames matching the canonical SA) but matches upstream wire shape and removes a port-incomplete bug flagged by `tools/usbmon_pcap_diff.py` (introduced in #55). Co-Authored-By: Claude Opus 4.7 (1M context) --- src/RadioManagementModule.cpp | 16 +++++++++++++--- 1 file changed, 13 insertions(+), 3 deletions(-) diff --git a/src/RadioManagementModule.cpp b/src/RadioManagementModule.cpp index d6fd202..692dadf 100644 --- a/src/RadioManagementModule.cpp +++ b/src/RadioManagementModule.cpp @@ -1202,14 +1202,24 @@ void RadioManagementModule::phy_set_tx_power_level_by_path(uint8_t channel, phy_set_tx_power_index_by_rate_section(path, channel, RATE_SECTION::VHT_2SSMCS0_2SSMCS9); } - /* 8814A 3-stream rate sections — must be programmed so the chip's TXAGC - * table is fully populated even though the USB-2 link can't sustain 3-SS - * data rates. Upstream PHY_SetTxPowerLevel8814 iterates all sections. */ + /* 8814A 3-stream + 4-stream rate sections — must be programmed so the + * chip's TXAGC table at BB 0x1998 is fully populated even though the + * USB-2 link can't sustain 3-SS or 4-SS data rates. Upstream + * PHY_SetTxPowerLevel8814 iterates ALL sections including 4SS. The + * earlier 3SS-only stop was a port-incomplete bug: a kernel-vs-devourer + * cold-init usbmon diff (2026-05-28, devourer-testrig VM) showed BB + * 0x1998 had ~248 fewer writes in devourer than kernel — a count + * proportional to the missing (8 HT_MCS24_MCS31 + 10 VHT_4SS) × 4 paths + * = 72 writes per `PHY_SetTxPowerLevel8812` apply. */ if (_eepromManager->version_id.ICType == CHIP_8814A) { phy_set_tx_power_index_by_rate_section(path, channel, RATE_SECTION::HT_MCS16_MCS23); phy_set_tx_power_index_by_rate_section(path, channel, RATE_SECTION::VHT_3SSMCS0_3SSMCS9); + phy_set_tx_power_index_by_rate_section(path, channel, + RATE_SECTION::HT_MCS24_MCS31); + phy_set_tx_power_index_by_rate_section(path, channel, + RATE_SECTION::VHT_4SSMCS0_4SSMCS9); } }