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RTL8814AU: iterate HT_MCS24-31 + VHT_4SS in per-path TX power apply#56

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RTL8814AU: iterate HT_MCS24-31 + VHT_4SS in per-path TX power apply#56
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8814au-0x1998-phydm-conditional

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Summary

phy_set_tx_power_level_by_path was stopping at 3SS for 8814AU, but upstream PHY_SetTxPowerLevel8814 iterates all sections including 4SS — even though USB-2 can't sustain 4-SS data rates, the chip's TXAGC table at BB 0x1998 still needs the full per-(path, rate) population to read correct gains for the rates that DO go on air. The existing comment in phy_set_tx_power_level_by_path ("upstream PHY_SetTxPowerLevel8814 iterates all sections") documented the intent but the patch stopped at 3SS.

Found via the new pcapng diff from #55. Cold-init usbmon diff against aircrack-ng/88XXau in the devourer-testrig VM (2026-05-28):

BB reg 0x1998 writes (cold init) count
Kernel 88XXau 1029
Devourer pre-patch 781
Devourer post-patch 925

The +144 delta matches (8 HT_MCS24-31 + 10 VHT_4SS) × 4 RF paths × 2 PHY_SetTxPowerLevel8812 applies per cold init = 144.

Caveat

Empirically does NOT close the on-air TX gate on 8814AU on its own — sniffer-attached AR9271 run on ch6 with this patch + DEVOURER_DRAIN_BULK_IN=1 (from #55) still shows 0 frames matching CANONICAL_SA. The remaining 104-write gap on 0x1998 plus new divergence signal at 0x0994 (kernel 55 / devourer 1), 0x0838 (devourer 49 / kernel 1), 0x08b0 (devourer 27 / kernel 1) suggests devourer and the kernel driver take different IQK / calibration paths — separate investigation.

This is a clean port-completion fix worth landing on its own.

Test plan

  • cmake --build build -j clean on Linux gcc / clang (CI will exercise macos + msvc)
  • WiFiDriverTxDemo with DEVOURER_PID=0x8813 DEVOURER_CHANNEL=6 runs through init + TX loop, no regressions
  • Cold-init pcapng diff confirms +144 writes to BB 0x1998 land on the wire as expected
  • Followup: chase 0x0994 / 0x0838 / 0x08b0 IQK-path divergence

🤖 Generated with Claude Code

`phy_set_tx_power_level_by_path` was stopping at 3SS for 8814AU, but
upstream `PHY_SetTxPowerLevel8814` iterates all sections including 4SS
even though USB-2 can't sustain 4-SS data rates — the chip's TXAGC
table at BB 0x1998 still needs to be fully populated. The existing
comment ("upstream PHY_SetTxPowerLevel8814 iterates all sections")
documented the intent but the patch stopped at 3SS.

Cold-init usbmon diff against `aircrack-ng/88XXau` in the
devourer-testrig VM (2026-05-28):

  Kernel writes BB 0x1998: 1029 times
  Devourer (pre-patch):     781 times
  Devourer (post-patch):    925 times

The 144-write delta matches (8 HT_MCS24-31 + 10 VHT_4SS) rates × 4 RF
paths × 2 `PHY_SetTxPowerLevel8812` applies per cold init = 144.

Empirically does NOT close the on-air TX gate on 8814AU on its own
(sniffer-attached run still shows 0 frames matching the canonical SA)
but matches upstream wire shape and removes a port-incomplete bug
flagged by `tools/usbmon_pcap_diff.py` (introduced in #55).

Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
@josephnef josephnef closed this May 28, 2026
@josephnef josephnef deleted the 8814au-0x1998-phydm-conditional branch May 28, 2026 19:10
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