sky130: use special_nfet_01v8 model for sub-0.42um nfets

[ThVerg]

Problem

On sky130, LVS reports a device class mismatch in every cell built from a minimum-width nfet:

Subcircuit summary:
Circuit 1: ..._pinv                              | Circuit 2: ..._pinv
sky130_fd_pr__special_nfet_01v8 (1)              | (no matching element)
sky130_fd_pr__pfet_01v8 (1)                      | sky130_fd_pr__pfet_01v8 (1)
(no matching element)                            | sky130_fd_pr__nfet_01v8 (1)
Netlists do not match.

The sky130 magic techfile selects the nfet device model by width:

device msubcircuit sky130_fd_pr__nfet_01v8 nfet,scnfet \
        *ndiff,ndiffres *ndiff,ndiffres pwell,space/w error \
        w>=0.42 l=l w=w a1=as p1=ps a2=ad p2=pd
device msubcircuit sky130_fd_pr__special_nfet_01v8 scnfet \
        *ndiff,ndiffres *ndiff,ndiffres pwell,space/w error \
        w<0.42 l=l w=w a1=as p1=ps a2=ad p2=pd

ptx always emits spice["nmos"], and sky130 sets drc["minwidth_tx"] = 0.360, so minimum-width devices are netlisted as sky130_fd_pr__nfet_01v8 while magic extracts them as sky130_fd_pr__special_nfet_01v8. Wider devices (e.g. w=0.74u) are unaffected, which is why only some gates fail.

The signed-off macros shipped in sky130A/libs.ref/sky130_sram_macros use the special device at exactly this geometry:

Xpinv_nmos Z A gnd gnd sky130_fd_pr__special_nfet_01v8 m=1 w=0.36 l=0.15

so this restores the naming those macros were built with.

Change

ptx.get_model_name() asks the technology for a narrow-device model keyed by width, and sky130 declares:

spice["nmos_narrow"] = "sky130_fd_pr__special_nfet_01v8"
spice["nmos_narrow_max_width"] = 0.42

Technologies that declare neither key keep the existing behaviour. There is no equivalent width split for pfets in the techfile, so only the nmos model is declared.

Verification

• pinv and pinv_dec go from Netlists do not match to Netlists match uniquely on a sky130_sram_1rw_tiny build (magic 8.3.568, netgen 1.5.323, open_pdks f3b5e46).
• special_nfet_01v8 resolves through sky130.lib.spice; a 0.36/0.15 device biased at 1.8V simulates in ngspice (183uA), so characterization is unaffected.
• freepdk45 still netlists nmos_vtg unchanged and builds end to end.
• 03_ptx_*_test.py results are unchanged (they fail identically with and without this patch in my environment, on klayout DRC setup).

Scope

This fixes the device-class half of sky130 LVS only; it does not make LVS clean on its own. Two further mismatches remain, both outside the scope of this patch:

• The sky130_fd_bd_sram cells netlist their pull-ups as sky130_fd_pr__special_pfet_pass, but that device does not exist in current open_pdks — magic extracts sky130_fd_pr__special_pfet_latch (ppu). This looks like naming drift in the pinned cell library.
• pnand2 extracts 7 nets against 6 in the netlist, which is a connectivity difference rather than a naming one.

Happy to split those out separately if useful.