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Added Microchip PolarFire SoC target, BSP framework, and CI/CD pipeline - #48

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AmmarOkla12772:feat/polarfire-icicle-bsp
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Added Microchip PolarFire SoC target, BSP framework, and CI/CD pipeline#48
AmmarOkla12772 wants to merge 3 commits into
eclipse-threadx:devfrom
AmmarOkla12772:feat/polarfire-icicle-bsp

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Overview

This PR adds support for the Microchip PolarFire SoC Icicle Kit under targets/Microchip/POLARFIRE_ICICLE_RENODE/.

The goal is to provide a reusable 64-bit RISC-V ThreadX target and condition-monitoring demo running in Renode, while establishing a common BSP abstraction for future targets and automated build and simulation validation through GitHub Actions.


Changes

  • Added 64-bit RISC-V PolarFire SoC BSP with MMUART, CLINT timer, PLIC, trap handling, and board initialization
  • Added multi-hart startup handling selecting Hart 1 (u54_1) for ThreadX execution and parking auxiliary application harts
  • Added target-specific machine trap vector configuration and 10 ms ThreadX system timer interrupts
  • Added a reusable BSP abstraction for board initialization, console output, and LED control
  • Added PolarFire SoC board configuration for CPU clock, CLINT RTC frequency, and DRAM boundaries
  • Added C runtime stubs for _write(), _sbrk(), and _exit()
  • Added an industrial condition-monitoring demo using simulated LM75 temperature data
  • Added producer-consumer communication using TX_QUEUE
  • Added threshold-based alarm handling using TX_EVENT_FLAGS_GROUP
  • Added virtual alarm LED control through the BSP abstraction
  • Added periodic telemetry reporting over the BSP console
  • Added automated Renode verification checking ThreadX boot, system tick progression, and overtemperature alarm output
  • Added GitHub Actions CI pipeline covering ARM Cortex-M4 and 64-bit RISC-V targets
  • Added pinned xPack RISC-V GCC toolchain configuration for reproducible CI builds
  • Added the required Eclipse ThreadX MIT/SPDX license headers across the added source, header, assembly, script, and build files
  • Updated target documentation with build, simulation, and automated test instructions

Validation

Tested locally using Renode and the configured cross-compilation toolchains:

  • PolarFire SoC target boots successfully in Renode
  • ThreadX system tick advances consistently at 10 ms intervals
  • ThreadX threads execute and context switching operates correctly
  • Simulated LM75 temperature data is processed through the monitoring pipeline
  • Overtemperature condition correctly triggers the alarm event flag and virtual LED
  • Telemetry output remains stable over the MMUART console
  • Headless Renode verification passes with expected ThreadX tick and alarm output
  • ARM NUCLEO-F401RE target builds successfully through the CI pipeline
  • PolarFire SoC 64-bit RISC-V target builds successfully through the CI pipeline
  • No compilation errors or local test failures

Toolchain

  • Arm GNU Toolchain for NUCLEO-F401RE
  • xPack RISC-V Embedded GCC 14.2.0
  • CMake + Ninja build system
  • Renode
  • GitHub Actions

Notes

The PolarFire target uses the reusable BSP interfaces for application-level hardware access, keeping the condition-monitoring application independent of platform-specific MMIO details. The CI pipeline provides automated build and headless Renode validation to detect build or runtime regressions.

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