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Make bitcast() work in generic contexts, remove reinterpret_* methods - #284

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Shnatsel merged 9 commits into
linebender:mainfrom
Shnatsel:remove-reinterpret
Jul 28, 2026
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Make bitcast() work in generic contexts, remove reinterpret_* methods#284
Shnatsel merged 9 commits into
linebender:mainfrom
Shnatsel:remove-reinterpret

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@Shnatsel Shnatsel commented Jul 27, 2026

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Motivated by #simd > Missing reinterpret_u64_* methods on Simd trait

  • Make bitcast() work in generic contexts on variable-width vectors
    • All SIMD vector types now use Self::u8s as their Bytes representation, which avoids arcane bounds
    • Add doctest and test coverage for generic bitcasts
  • Remove type-specific reinterpret_* methods which blow up the API surface quadratically
  • Remove intrinsics-backed cvt_to/from_bytes implementations, use safe transmute to implement them instead
  • Alias reinterpret and transmute to bitcast to make it more discoverable via search

@Shnatsel Shnatsel mentioned this pull request Jul 27, 2026

@LaurenzV LaurenzV left a comment

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Nice! Bonus points for maybe letting AI code up some examples that use reinterpret before vs. after and making sure there are no obvious regressions in assembly, but here I'm less concerned than in #286, so it should be fine.

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I had Codex do that before opening the PR and the assembly is identical, but self-contained examples always optimize well, so that's neither here nor there.

I see Vello has a few reinterpret calls, so I'll port it to this PR, disassemble the relevant functions and compare before and after.

# Conflicts:
#	CHANGELOG.md
#	fearless_simd_gen/src/mk_simd_trait.rs
#	fearless_simd_tests/tests/generics.rs
Shnatsel added a commit to Shnatsel/fearless_simd that referenced this pull request Jul 27, 2026
The relationships that already hold for all types are now encoded in the
type system, to allow more things to be expressed in generic code. Adds
tests to enforce that this kind of generic code will keep compiling.

Unlike linebender#284 this is not a breaking change because all the relevant
traits are sealed (except SimdFrom but the change involving it is
non-breaking).
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This optimizes fine, save for a register allocation perturbation in one function on AVX-512 only: linebender/vello#1773

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Shnatsel added this pull request to the merge queue Jul 28, 2026
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github-merge-queue Bot removed this pull request from the merge queue due to failed status checks Jul 28, 2026
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Shnatsel enabled auto-merge July 28, 2026 15:42
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Shnatsel added this pull request to the merge queue Jul 28, 2026
Merged via the queue into linebender:main with commit cd3e9a6 Jul 28, 2026
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Shnatsel deleted the remove-reinterpret branch July 28, 2026 15:58
pull Bot pushed a commit to Mu-L/vello that referenced this pull request Jul 31, 2026
…nder#1773)

Adjusts for linebender/fearless_simd#284

`bitcast()` was already present in earlier versions, so this still works
with fearless_simd v0.4, all the way to the upcoming v0.7

The generated assembly is identical on SSE4.2 and AVX2. AVX-512 adds two
register moves in the large function `pt_splat_simd` gets inlined into
because the change perturbed the IR and resulted in different register
allocator choices.
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