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Pull requests: lowRISC/opentitan

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Pull requests list

[darjeeling/verilator] Auto-generate Verilator chiplevel
#30503 opened Jun 24, 2026 by glaserf Contributor Loading…
[ibex, rtl] Move to ratified bitmanip extensions
#30502 opened Jun 24, 2026 by thommythomaso Contributor Draft
[Task] Skip ECC bits when hashing ROM for KMAC (#30485)
#30497 opened Jun 24, 2026 by JoshuaF-ML Loading…
[wip] Drop CW310 from Bazel tree
#30494 opened Jun 23, 2026 by jwnrt Contributor Draft
[vendor] PULP debug module patch cleanup
#30480 opened Jun 20, 2026 by marnovandermaas Contributor Loading…
[site] Various site functional and theme fixups and improvements
#30479 opened Jun 20, 2026 by hcallahan-lowrisc Contributor Loading…
[top_earlgrey] Remove PWM
#30476 opened Jun 19, 2026 by vogelpi Contributor Loading…
[opentitantool] Add FPGA bkdr_loader TAP definition & initial commands
#30474 opened Jun 19, 2026 by AlexJones0 Contributor Loading…
[otbn] Add otbn_kmac_if to otbn fusecore
#30449 opened Jun 18, 2026 by victornwaliLowRISC Contributor Loading…
[doc] RRAM documentation
#30437 opened Jun 17, 2026 by gautschimi Contributor Draft
[englishbreakfast/verilator] Auto-generate Verilator chiplevel
#30431 opened Jun 16, 2026 by glaserf Contributor Loading…
[earlgrey/verilator] Auto-generate Verilator chiplevel
#30430 opened Jun 16, 2026 by glaserf Contributor Loading…
[earlgrey/verilator] Integrate padring into chiplevel
#30428 opened Jun 16, 2026 by glaserf Contributor Loading…
[sw] RRAM Earlgrey integration: dif_functions
#30422 opened Jun 16, 2026 by gautschimi Contributor Draft
[rtl] RRAM Earlgrey integration
#30420 opened Jun 16, 2026 by gautschimi Contributor Draft
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